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Internal FDP on Laboratory Experiments (3rd, 5th & 7th Semester)

Event Duration: 27th & 30th July, 2018

Schedule:

Name of the lab

Resource Person

Date

Time

15ECL76

(ADC Lab)

Prof. P Bhuvaneswari

27/7/2018

9AM – 12PM

15ECL37

(AEC Lab)

Prof. Satya Sreenivas M

27/7/2018

1PM – 4PM

15ECL57

(DSP Lab )

Prof. Sunitha R

30/7/2018

9AM – 12PM

15ECL77

(VLSI Lab)

Prof. S M Vijay

Prof. Santosh G

30/7/2018

1PM – 4PM

Mode of Event: Intra department level

Venue: Department of ECE, RRCE, Bengaluru

No. of Staff enrolled:24

Outcome of the Event:

  • Advanced Digital Communication Lab
    • Explained about the microwave test bench and the conduction of frequency and wave length measurement at x-band of operation.
    • Antenna experiment was conducted using microstrip,yagi-uda antenna at ‘S’ band of operation and antenna parameters namely gain, directivity measured.
    • Using optical communication kit, the different kind of losses like attenuation loss, bending loss, coupling loss were measured with help of one meter and three meter length optical fiber.
    • Some of the simulation kind of digital communication experiments were tested using MAT LAB-2017
  • Analog Electronic Circuit Lab
    • Explained various circuits like series, shunt, single ended and double ended circuits and demonstrated the same.
    • Explained clamper operation for +ve ,-ve peak clampers with and without reference and demonstrated the same
    • Explained & connected the circuits for Hartly Colpittts , crystal oscillators a, feedback amplifier and demonstrated.
  • DSP using MAT Lab
    • Introduction to MAT Lab, its importance and familiarization with MAT Lab software.
    • Trained for software programs and interfacing with hardware.
    • Demonstration about how to use tool boxes for different applications/projects like image processing ,ANN, fuzzy logic ,Signal processing etc which is useful to guide the student to do project using MAT lab.
  • VLSI Lab
    • Basic concept of digital and analog Circuits and provides guidelines to guide VLSI based UG Projects.
    • Introduction about cadence tool and trained for digital and analog experiments such as functional verification, logical verification, layout verification ,expecting parasitic resistances and capacitances.

View Event Report